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TE Connectivity has recently launched its Ultra Low-Profile (ULP) PCIe Gen 7 connectors and cable assemblies to enable the data speeds and electrical performance that next-generation data centers and AI applications demand.
Delivering cutting-edge PCIe Gen 7 electrical performance in an ultra low-profile mating height of 8.7mm, TE’s innovative design not only offers data rates of 128 gigatransfers per second, but also can fit into tight spaces, such as beside a CEM connector slot, under heatsinks or near chips. Centrally located sidebands help ensure notable signal integrity and improved host board routability, enhancing the manufacturability and overall system performance of customer systems.
“The market outlook for PCIe Gen 7 technology has been spurred by the swift growth of artificial intelligence, machine learning and data centers combined with the escalating intricacy of technical standards,” comments TE Product Manager Laura Wang. “AI models are becoming twice as complex every four to six months, outstripping Moore’s Law and straining existing infrastructures. Hyperscale data centers today are hard-pressed to deliver the speed and low latency needed for processing trillion-parameter models.”
Earlier this year, TE demonstrated the ULP PCIe Gen 7 connector at DesignCon 2025 in Santa Clara, California, where the company showed how the connector performs at speed.
“The successful demonstration underscores TE’s commitment to innovation ahead of the market,” Wang says. “We are also now at the point where we can offer samples to customers, and we anticipate production capability in early 2026.” Certain restrictions/limitations on samples may apply.
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